In conventional switch-type voltage regulators, when the supply voltage VDD rises, the pulse width modulated (PWM) signal has the largest duty cycle at the very beginning due to the error amplifier thereof having an excessively high gain. It results that the input power supply quickly transmits energy into the power conversion module at an output end thereof. This will cause damages to the power conversion system by overvoltage and overcurrent. Therefore, it is necessary to soft-start the switch-type voltage regulator, in order to exactly protect the power conversion system.
FIG. 1 shows a conventional soft-start circuit 12 consisting of a resistor 121, a capacitor 122, and two Zener diodes 123, 124 to effectuate soft starting. In the circuit 10 shown in FIG. 1, when a supply voltage VDD (not shown) is about to rise, the error amplifier 11 outputs an error signal ERR to discharge via the capacitor 122 and the Zener diode 124 to the circuit common ground VSS; and when the supply voltage VDD rises, a reference voltage REF starts charging the capacitor 122 via the resistor 121 with a charging time constant of τ=R1*C1. When the capacitor 122 is fully charged, the Zener diode 124 will be reverse biased, so that the output of the comparator 13 is isolated from and no longer affected by the soft-start circuit 12 to achieve the purpose of soft starting the converter. Since a relatively large charging time constant is required, relatively large resistance value at the resistor 121 and capacitance value at the capacitor 122 are required. Therefore, in general application, the capacitor 122 is usually externally connected to the circuit to save the integrated circuit chip area. However, by doing this, the number of externally connected elements and the number of packaged pins are increased at the same time.
FIG. 2 shows another conventional soft-start circuit 22 consisting of a resistor 221, a capacitor 222, and an input buffer 223 to effectuate soft starting. In the circuit 20 shown in FIG. 2, since the resistor 221 and the capacitor 222 are charged by a supply voltage VDD with a charging time constant of τ=R2*C2, the capacitor 222 has a voltage level VC that rises from a circuit common ground VSS when the supply voltage VDD rises. The voltage REF2 input at the non-inverting terminal of the error amplifier 21 refers to the voltage level VC of the capacitor 222 when the supply voltage VDD rises, so that the error amplifier 21 compares the voltage FB2 input at the inverting terminal thereof with the voltage level VC of the capacitor 222. When the capacitor 222 is fully charged, it no longer affects the error amplifier 21, so that the output of the comparator 23 is isolated from and no longer affected by the soft-start circuit 22. It achieves the purpose of soft starting the converter by the above-mentioned process. Similarly, since the conventional soft-start circuit 22 shown in FIG. 2 requires a relatively large charging time constant, relatively large resistance value at the resistor 221 and capacitance value at the capacitor 222 are required. Therefore, in general application, the capacitor 122 is usually externally connected to the circuit to save the integrated circuit chip area. However, by doing this, the number of externally connected elements and the number of packaged pins are increased at the same time.